Damascene Metal Gate Technology: A Front-end CMP Based Universal Platform for High-k Evaluation at the Device Level

Recently, very promising properties of epitaxially grown, crystalline rare-earth metal-oxides have been reported [1] and the integration of Pr2O3 dielectric in a conventional polysilicon CMOS process was successfully demonstrated [2]. However, high temperature annealing [3] and aggressive reactive ion etching (RIE) was found to degrade the initial quality of the sensitive high-K gate stack [2]. In order to minimize process induced oxide damage (PIOD), we have integrated crystalline high-K dielectrics into a virtually damage-free replacement gate process [4, 5]. For the first time, fully functional metal gate MOSFETs with crystalline Gd2O3 dielectric have been fabricated by means of front-end chemical mechanical planarization (CMP) in a “gentle” damascene metal gate technology.